PhyCircuit
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⌁ Engineering, not drafting

PCBs that
obey physics.

Senior EEs design your board against real signal, power, and thermal physics — and we ship you the TRM thermal report to prove it.

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  • 300+ designs
  • 20+ years
  • 1–99 layers
  • Altium · Orcad · Siemens

Trusted by hardware teams shipping

DDR5 @ 6400 MT/s PCIe Gen 5 100G SerDes 0.1–28 GHz RF 200 A rails Rigid-flex
⌁ New · The Lab

Where physics, silicon, and AI converge.

Experiments, puzzles, and ideas that don’t fit on the main site. Drag a trace through a 0.5 mm-pitch BGA. Solve the breakout.

Enter Lab →
⌁ What we do

Three things. Done at physics-grade.

PCB design

High-speed, RF, high-current, thermal-critical boards. We design the board the way we’d design our own.

  • 1–99 layer stackups
  • DDR4/5, PCIe, 100G SerDes
  • RF up to mmWave
  • Rigid-flex, chip-on-board
See services →

TRM thermal simulation

Steady-state and transient PCB thermal + PDN, browser-trial, credit-card pricing, Altium-integrated. Co-developed with Adam Research.

  • 1–99 layers, SMD + TH + embedded
  • Current density, voltage drop, T(°C)
  • Pre- and post-layout
  • 14-day trial · no sales call
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AI tools, free

Free calculators and AI copilots that the PCB industry hasn’t built. Use them anonymously, no signup.

  • Φ PDN Extractor — DC IR drop + decoupling, live
  • Φ Altium — live design AI
  • Φ Gerber — AI Gerber review
  • Φ Stack — stackup sage
  • Φ Datasheet — Q&A on any PDF
Try PDN Extractor free → All tools →
⌁ Live demo · no signup

Drop a Gerber. Get an AI review in 30 seconds.

Φ Gerber inspects your stack, traces, vias, and copper pour against IPC-2152 and 20 years of PhyCircuit field experience. You get a plain-English report and a list of fixes you can paste into Altium.

  • ✓ DRC violations explained like a senior engineer would
  • ✓ Thermal hotspots predicted before fab
  • ✓ Stackup sanity check vs. impedance targets
  • ✓ Cited against IPC-2152 / 2221 / 7351
Open Φ Gerber →
Drop a Gerber ZIP or click to pick Max 64 MB · We never store your file
✓ Stack-up parsed: 6 layers · 1.6 mm
✓ 142 nets · 1,488 vias · 12 differential pairs
! U7 thermal — 81 °C predicted, IPC class 2 fails at 85 °C — see fix
! Diff pair DP_7 length-match drift 8.2 mil > spec 5 mil
✓ Copper pour clears 100 µm everywhere
→ Generated Phi-Gerber-Report.pdf
Φ PDN Extractor · Free · No signup

Drag-drop your Altium or KiCad board → DC IR drop + decoupling check in seconds.

The only live, zero-signup, immediately usable PDN analysis tool built by working PCB engineers. No Altium licence. No SIwave seat. Board data stays on your machine.

✓ Altium .NET ✓ KiCad ✓ OrCad ✓ Gerber ZIP
Analyze your board →
Free · no account
Phi Altium · live session · localhost
$ phy classify –board coffeenmusic.PrjPcb
✓ MCP connected · Altium Designer 25 · running locally
Reading 159 nets from live board…
✓ 159 nets read · 0 bytes left your machine
Classifying with Claude (local reasoning)…
✓ 59 signal nets classified into 8 net classes. Diff:
DDR5_DQ[0..31] —> DDR5_DATA · 3 mil / 3 mil clearance
CLK_100M, CLK_100M_N —> DIFF_CLK · 4 mil / 4 mil clearance
VCC_3V3, VCC_5V, GND —> POWER · 12 mil / 10 mil clearance
+ 5 more net classes…
! Write-back preview. Confirm? [y/N] |
✓ 8 net classes written into Altium. Restore point saved.
! Proven on 2 live boards · 54/54 tests · 50 MCP tools

AI that reads your
live Altium design.
Locally. Privately.

The AI connects to a running Altium session on your machine, reads the live design, reasons about it, and writes changes back. No cloud. No Altium 365 subscription. Proven on an audio board and a Xilinx Spartan-IIE FPGA — your design data never leaves your computer.

  • ✓2 real boards proven: a 159-net audio board + a Xilinx FPGA (VCCINT/VCCO-aware)
  • ✓Defense, ITAR, and NDA designs stay on your hardware — always
  • ✓Preview diff before every write — no silent mutations, ever
  • ✓50 live MCP tools. Net classify, PDN audit, AI Design Review, placement review.
Join early access vs. Altium 365 AI: cloud-only · ITAR-ineligible · $$$
⌁ TRM Thermal Risk Management

The thermal sim engineers actually use.

1–99 layers. Steady-state and transient. Pre- and post-layout. Altium-integrated. Browser trial. Credit-card priced.

Start free 14-day trial →
99
layers max
±3 °C
typical vs. lab measurement
5 min
first sim, no meshing
1/10×
price of Icepak
⌁ Recent work

Boards we signed off this quarter.

Anonymized at client request. Stats are real.

14-layer DDR5 server

  • 14 layers
  • DDR5 @ 6400 MT/s
  • 28 diff pairs
  • ±3 ps skew

Re-spun a vendor design that wouldn’t train above 4800. Stackup change, escape re-route, and a TRM thermal report that ended the procurement debate.

Read the case study →

120 A buck supply, EV

  • 6 layers
  • 120 A continuous
  • 3 oz copper
  • 82 °C max

Customer wanted to know if 2 oz copper plus heatsinks would be enough. TRM said no — we re-spec’d to 3 oz and saved a re-spin in NPI.

Read the case study →

5.8 GHz RF transceiver

  • 8 layers
  • Rogers 4350B
  • −110 dBm noise floor
  • 50 Ω ± 5 %

Mixed-signal board with 5.8 GHz RF on the same stackup as a Cortex-M and a buck supply. We isolated, shielded, and proved the RF NF in measurement.

Read the case study →
⌁ Field guide · free PDF

The PCB Designer’s Field Guide

40 pages of checklists for high-speed, RF, thermal, and manufacturing. Written by our senior EEs. No LLMs.

Ready when you are.

Senior EEs answer every inbound. No SDR funnel. No 9-step discovery call.

Get a quote ↗ Try TRM free