Physics-grade
Every design decision is justified by math, simulation, or measurement. “Looks fine” is not a strategy. Decisions are written down.
Engineers, not drafters.
We’re a small team of senior EEs who treat every board like our own. No outsourced clicks. No junior layout factory. Just physics, math, and design discipline.
300+designs shipped
20+years experience
1–99layer range
±3 °Ctypical TRM vs. measurement
⌁ Founder
Ulisses Costa
Principal EE · PhyCircuitBoard founder
20+ years across hardware product development, manufacturing engineering, R&D, and high-performance PCB design. Holds engineering and master’s degrees in electrical engineering. Has led signal-, power-, and thermal-integrity for boards shipping in medical, defense, telecom, and consumer.
Founded PhyCircuitBoard because the gap between “layout shop” and “consulting EE” was too big. We sit in the middle: engineering-credible enough to argue with your IC vendor, hands-on enough to draw the board ourselves.
Specialties
- DDR4 / DDR5 / LPDDR5 layout, signal integrity, training
- PCIe Gen 4 / 5, 100G SerDes, high-speed differential routing
- RF design 0.1–28 GHz (Wi-Fi, BLE, 5G sub-6, mmWave intros)
- Power electronics 1–200 A, GaN/SiC topologies, EV/industrial
- Thermal sign-off using TRM (Adam Research partnership)
- Reverse engineering, EOL recovery, design rescue
Two decades, one obsession.
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2005
Manufacturing floor
First job: SMT line engineer, watching boards fail and learning why.
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2010
R&D + product design
Hardware lead at a med-device startup. First DDR3, first RF, first thermal sign-off.
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2015
Independent practice
Hung the PhyCircuitBoard shingle. First defense contract. First eval board for an IC vendor.
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2019
TRM partnership
Met Dr. Johannes Adam. Started using TRM on every sign-off. Eventually became the North-American channel.
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2024
300th board
Crossed 300 designs. The pattern recognition gets unreasonable around board #200.
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2026
v2 launch
This site. AI-native tooling. The PCB world isn’t ready, and it’s about time.
How we work.
Engineering, not drafting
Senior EEs touch every board, every layer. No outsourced clicks. Weekly screen-shared reviews — you see the layout evolve, you don’t get a surprise on day 30.
Open by default
We publish our calculators, our heuristics, our methods. The TRM thermal report goes home with you. We’d rather lose a deal than gate-keep what we know.
Talk to a real engineer.
No SDR. No discovery-call shuffle. The founder reads every inbound.