USB-C & Power Delivery layout — power and SI on one connector.
TL;DR
- USB-C is two problems on one connector: high-current VBUS (up to 5 A, 100 W PD; 240 W EPR at higher voltage) and 10–20 Gbps SuperSpeed pairs. Route them as if they were separate boards that happen to share a part.
- VBUS wants wide copper / pours sized to 5 A with thermal margin; SS pairs want 90 Ω differential, short, length-matched, with a clean reference and minimal vias.
- Don’t forget the boring stuff that fails compliance: CC pin pull-downs/up, the orientation mux/retimer placement, and TVS/ESD right at the connector.
VBUS and the current path
Standard USB-C PD delivers up to 5 A. At 100 W that’s 5 A at 20 V; EPR pushes to 48 V / 5 A (240 W). Treat VBUS like a power trace: size the copper for 5 A continuous with a sane temperature rise (use the current calculator), prefer a pour or wide trace over a thin one, and watch the connector pin fan-out — the neck at the connector is the usual hotspot. Put bulk capacitance close, and don’t run VBUS as a skinny trace under the SuperSpeed pairs.
SuperSpeed pairs (USB 3.2 / USB4)
The TX/RX SuperSpeed pairs are 5–20 Gbps differential — treat them as high-speed diff pairs:
- 90 Ω differential impedance (USB spec), controlled via stackup.
- Short and direct from connector to mux/retimer/host; SuperSpeed loss budget is tight, especially through the orientation mux.
- Tight intra-pair skew; minimal vias; continuous ground reference under the pairs.
- AC-coupling caps where the spec requires, with optimized pads.
- For USB4 / 20 Gbps, you’re in backdrill-and-low-loss-material territory.
VBUS pour (left) isolated from 90 Ω SS pairs (right) · mux placed at the connector
CC pins, the mux, and ESD
- CC1/CC2 handle orientation detection and PD negotiation. They need the correct Rp/Rd terminations (or a PD controller) and a clean, short route — and protection, because they’re on the connector.
- Orientation mux / retimer — because USB-C is reversible, a mux (or retimer for longer/faster channels) steers the SS pairs. Place it right at the connector to keep the pre-mux stubs short; a retimer re-opens the eye for USB4/Thunderbolt reach.
- ESD/TVS — every exposed connector pin (VBUS, CC, SBU, SS, D+/D−) gets ESD protection placed at the connector, before any sensitive silicon, with low-inductance grounding. Low-capacitance TVS on the SS pairs so you don’t load the high-speed lines.
USB-C fails compliance on the unglamorous pins — CC terminations, mux placement, ESD at the edge. Get those right and the SI/power follow.
USB-C / PD checklist
- ☐ VBUS sized for 5 A continuous (pour/wide trace) with thermal margin; bulk cap close
- ☐ Watch the connector-pin neck — the VBUS hotspot
- ☐ SS pairs 90 Ω diff, short, length-matched, minimal vias, continuous reference
- ☐ Orientation mux/retimer at the connector; retimer for USB4/long reach
- ☐ CC1/CC2 correct Rp/Rd or PD controller, protected
- ☐ Low-capacitance ESD/TVS on every connector pin, grounded low-inductance
- ☐ Power and SS physically + referentially separated
Need it designed?
USB-C / PD sits across our high-speed and power practices — both on one connector, done right. Scope a project.
References
- USB-IF, USB Type-C and USB Power Delivery specifications.
- USB 3.2 / USB4 routing guidelines (host-silicon vendor app notes).
- IPC-2152 (VBUS current), IPC-2141A (SS impedance).