AI that closes the
thermal analysis loop.
Reads your TRM simulation output, estimates component power from the BOM, runs the thermal analysis, catches violations — including the bench-passes-field-fails trap. Nothing leaves your machine.
The thermal AI that catches
what bench testing misses.
U1 FPGA tested at 38°C on the bench. Same board in a 70°C industrial enclosure: 88°C — 3°C over the absolute limit. TRM shows the numbers; Phi TRM AI catches the verdict, flags the violation, and prescribes the fix.
Five steps. All local.
An MCP server bridges the AI to your TRM simulation files. Design data stays on your machine at every step.
Point at your TRM project folder
The MCP server indexes your TRM output directory: Components.txt, simulation reports, hotspot data, AltiumData exports. One path, all data.
AI estimates power from your BOM
Claude parses the BOM or pick-place file (Altium or Cadence Allegro), classifies each component (FPGA, DDR, LDO, inductor, decap…), and estimates power draw from a verified corpus of 40+ component classes.
Run TRM, parse the results
After simulation, the AI reads the thermal report (board temperatures, per-component Tmax, Tmean) and the electrical report (Vdrop, RDC, Joule heating per net).
Derating check — the bench-vs-enclosure trap
The board looked fine at 20°C bench ambient. In a 70°C industrial enclosure, U1 reaches 88°C — 3°C over its absolute maximum. The AI catches this before production. Every time.
Engineering verdict + trace fix
One verdict: PASS or FAIL, with the specific violation and IPC-2152 trace-width fix included. The AI calibrates its power estimates against TRM actuals over time — every run makes it more accurate for your board family.
25 TRM MCP tools.
Every tool is read-only or generates output files — no silent modifications to your TRM project.
Thermal analysis
Reads TRM simulation reports: board temperature range, per-component Tmax/Tmean, hotspot identification. Views heat-map images directly. Runs derating checks at any ambient temperature.
PDN + electrical check
Parses TRM’s electrical simulation: Vdrop per net, RDC, Joule heating. Flags nets over the 5% target. Prescribes trace-width fixes (IPC-2152) with specific millimeter values.
Power estimation
Classifies BOM components and estimates power draw from a corpus verified against 40+ real parts (DDR, Artix, Cyclone, STM32, buck, LDO, PHY, op-amp, MOSFET, USB-C). Calibrates estimates against TRM actuals — accuracy improves with every run.
Before / after comparison
Compare two simulation runs to see whether a design change fixed the violation. The AI tracks which changes improved Vdrop, reduced Tmax, or resolved a derating failure.
TRM + Altium closed loop
AI reads the PDN audit from Phi Altium, applies it to the TRM thermal model, and links decoupling-cap placement changes to Vdrop improvements across both tools.
The three steps engineers skip.
| Task | Phi TRM AI | Manual |
|---|---|---|
| Power estimation for new board | Automatic from BOM — Altium + Cadence Allegro formats | Datasheet lookup, 1–2 hours per board |
| Derating check for enclosure use | Built-in — any ambient temperature, per component | Rarely done before production |
| PDN Vdrop verdict + trace fix | Automatic — IPC-2152 width prescription per net | Separate tool or manual calculation |
| Before/after simulation comparison | One tool call, structured diff | Side-by-side screenshots |
| Heat-map image review | Claude views heat maps directly (vision) | Manual TRM viewer |
| Data stays private | Always — TRM files never leave machine | Depends on toolchain |
Spartan3 SL1 — actual run.
One get_full_analysis call on a real board. Report generated 2026-06-02 from a 2026-06-01 TRM simulation.
Be in the first cohort.
The closed-loop pipeline is running. We’re onboarding TRM users to validate the power estimation and derating logic on their own boards. Priority goes to teams running industrial, defense, or automotive designs — where the bench-vs-enclosure trap has the highest cost.
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Also: Phi Altium
AI that reads your live Altium design, classifies nets, audits power delivery, and generates a design review — all locally. Pairs with Phi TRM AI for the full closed loop.