Real quote. 60 seconds.

Answer 6 questions. The scoper estimates a fixed-fee band, flags risk, and proposes a stackup before a human even reads it. A senior EE then confirms — usually within 24 h.

1 · Scope 2 · Signals 3 · Power 4 · Compliance 5 · Deadline 6 · You

Step 1 of 6 What kind of project?

New design from scratchYou have a spec and a schematic (or want help with both). Re-spin of an existing boardYou have a baseline that needs fixes or performance lift. Independent reviewYour team did the layout — you want a senior EE to verify. Thermal sign-off (PhySignoff)You need a TRM-backed report for procurement / certification. Reverse engineeringYou have boards but no CAD. We rebuild.

Step 2 of 6 What’s the signal mix?

Check everything that applies. The more checked, the higher the complexity tier.

Low-speed digital only (< 100 MHz) High-speed digital (USB 3, PCIe, Ethernet) DDR4 DDR5 100G SerDes / PAM-4 RF (Wi-Fi, BLE, sub-GHz, < 6 GHz) mmWave (24+ GHz) Mixed signal (ADC/DAC, sensors)

Step 3 of 6 Power and thermal?

Peak current on the highest rail

< 5 A 5–20 A 20–100 A > 100 A

Worst-case ambient

≤ 25 °C (lab/office) 55 °C (industrial) 85 °C (automotive Q100) 125 °C (military / under-hood)

Step 4 of 6 Standards & compliance?

IPC class 2 (commercial) IPC class 3 (high-reliability) IPC class 3A (aerospace) ISO 26262 (automotive functional safety) IEC 60601 (medical) FCC / CE EMC pre-compliance ITAR / EAR (defense)

Step 5 of 6 When do you need it?

Deadline

Rush (≤ 3 weeks) Normal (4–8 weeks) Flexible (8+ weeks)

Anything else you want us to know? (interfaces, mech constraints, board size)

Estimate ready Your fixed-fee band.

PhyDesign

—

indicative · senior EE confirms within 24 h

Drop your contact and we’ll lock the quote. No spam, no SDR; the founder reads every inbound.

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